[00:00:00] Speaker 00:
May I please the court?

[00:00:02] Speaker 00:
The board's decisions are problematic with error for three primary reasons.

[00:00:05] Speaker 00:
I'll touch on those and I'll go into those in some detail.

[00:00:09] Speaker 00:
First, the board denied netlist its procedural rights by basing its decision for ground three on a rejected theory that was raised for never instituted ground two.

[00:00:20] Speaker 00:
Second, the board erred by basing its holding on collateral estoppel.

[00:00:24] Speaker 00:
from the earlier 970-971 IPR decisions for the limitations of the independent claims, but those earlier decisions were based on a single device block single sequencer configuration that is incompatible with placement of Avrabuj's memory interfaces and separate ICs as required by petitioner's theory for the dependent claims.

[00:00:45] Speaker 02:
So what, in your view, it seems to me that these procedural aspects really pervade both of these cases.

[00:00:52] Speaker 02:
What, in your view, should have been different procedurally?

[00:00:58] Speaker 00:
OK.

[00:00:59] Speaker 00:
Your Honor, procedurally, let's tackle that issue.

[00:01:05] Speaker 00:
petitioner was obligated to set forth the complete basis for its ground three theory in its petition.

[00:01:12] Speaker 00:
And it clearly did not do that here.

[00:01:15] Speaker 00:
Ground three does not build upon ground two as the board reason that sometimes can be the case.

[00:01:21] Speaker 00:
Here ground three was distinct from and inconsistent with ground two.

[00:01:26] Speaker 00:
Ground three placed both the memory interfaces and the sequencer in the same single IC, whereas ground two placed each of these components

[00:01:34] Speaker 00:
in separate ICs.

[00:01:36] Speaker 00:
Now, the board treated these as distinct contentions, akin to allegations of a complaint.

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But this is, by statute, an agency trial on the merits.

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And there was a submission of evidence that this far transcends a contention.

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And the submission here was an admission from ground three, placing the sequencer and the memory interface together in the same IC as an admission that refutes any inconsistent allegation with ground

[00:02:03] Speaker 00:
from Ground 2.

[00:02:05] Speaker 00:
Now the statutory framework here is that the patent owner shouldn't have to engage in guesswork about how some inconsistent position from Ground 2 could be understood to apply for Ground 3.

[00:02:17] Speaker 03:
So what's the standard of review that we apply to the board's conclusions?

[00:02:24] Speaker 00:
The standard review is de novo.

[00:02:25] Speaker 00:
And, Your Honor, you'll find that in NRA Magnum Oil Tools and also in this court's decision of two weeks ago, NRA IPR licensing case number 2018-1805.

[00:02:35] Speaker 00:
And I think that's informative here, because in that decision, well, first of all, that cites the Magnum Oil Tool case, and this court has

[00:02:45] Speaker 00:
line of cases that address these procedural due process concerns and Magnum oil stands for the proposition that the board must base its decision on arguments who are advanced by a party and to which the opposing party was given a chance to respond no in Ray I pay our licensing cited that very language and also cited the board regulations and said an issue upon which the board does not institute review is not part of the ensuing inner party's review proceeding so the ground to issue is

[00:03:13] Speaker 00:
of placing the sequencer in its own separate IC was an issue that was not part of the proceeding because it was never instituted.

[00:03:21] Speaker 00:
And so that highlights the procedural error in this case.

[00:03:27] Speaker 02:
The theory is that those issues were adequately explored anyway.

[00:03:33] Speaker 00:
Yeah, well, and I would suggest in Ray IPR licensing says you can't do it.

[00:03:37] Speaker 00:
It was never instituted.

[00:03:39] Speaker 00:
And so the patent owner wasn't even given an opportunity to respond to that.

[00:03:42] Speaker 00:
The patent owner is only supposed to respond to instituted issues.

[00:03:47] Speaker 00:
And I think the court picked up on that, that particular argument and procedural protection that's required here.

[00:03:54] Speaker 00:
But I would submit even beyond that, if you set that aside, the board reason that ground three builds upon ground two.

[00:04:01] Speaker 00:
And that's just not the case here.

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Ground three is inconsistent.

[00:04:04] Speaker 00:
with ground two.

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So we therefore submit there is a procedural error here and a violation of netless procedural and due process rights for that reason.

[00:04:12] Speaker 00:
They can't come in and be expected to challenge grounds that were raised only for ground two when ground two was never instituted.

[00:04:20] Speaker 00:
And IPR licensing supports and highlights that problem with that.

[00:04:25] Speaker 00:
And this takes me to Justice Alito's statement and his opinion in Quozo Speed, where he said that the petition fails to state that the challenge with particularity, the patent owner is left to shoot in the dark.

[00:04:39] Speaker 00:
The potential for unfairness is obvious.

[00:04:42] Speaker 00:
And that's what we have here.

[00:04:44] Speaker 00:
You can't shoot in the dark.

[00:04:45] Speaker 00:
The Patent Order needs to have a clear statement as required by statute with particularity of the full grounds for ground three in the petition.

[00:04:55] Speaker 00:
And in this case, it just wasn't done that way.

[00:04:59] Speaker 00:
Now, it's telling that

[00:05:01] Speaker 00:
Well, if I move on to another issue, unless you have some further questions.

[00:05:05] Speaker 03:
Are we going to move on to the merits?

[00:05:06] Speaker 00:
Yes.

[00:05:07] Speaker 00:
With respect to the board's reliance on collateral stop, I'll come to that if I have time permitting.

[00:05:12] Speaker 00:
But at the end of the day here, the board's decision is erroneous in law because it rests on hindsight, legal reasoning, and incorrect legal analysis.

[00:05:24] Speaker 00:
The combination of Avrabuj and CERN does not place each of Avrabuj's memory interfaces each in their own separate IC apart from one another or apart from their single common sequencer control module.

[00:05:37] Speaker 00:
You have a single device block with one control, one sequencer as a control module.

[00:05:43] Speaker 03:
But the board dealt with that, right?

[00:05:45] Speaker 03:
I mean, at least there was an expert by the other side.

[00:05:48] Speaker 03:
that said that it would have been obvious to separate all the components onto a single chip.

[00:05:54] Speaker 03:
And the board relied on that expert testimony.

[00:05:57] Speaker 03:
So what do we do with that under substantial evidence review?

[00:06:01] Speaker 00:
First, the board committed error in that that testimony is not supported by CERN.

[00:06:07] Speaker 00:
The board looked to the structures of CERN.

[00:06:09] Speaker 00:
First, it said, we've already recognized underground two.

[00:06:13] Speaker 00:
Average doesn't place these separate self-test circuitry in their own individual components.

[00:06:17] Speaker 00:
we need to look to the structures of CERN.

[00:06:20] Speaker 00:
But when you look to the structures of CERN, all of the cell test circuitry is placed in the same IC buffer.

[00:06:27] Speaker 00:
That's Avrabuj's sequencer and memory interfaces would be placed in the same IC buffer.

[00:06:32] Speaker 00:
So there's no teaching of separating address and control or data and placing them in separate IC buffers.

[00:06:42] Speaker 00:
CERN puts all of that in the same buffer.

[00:06:45] Speaker 00:
There's no basis, this is pure hindsight to carve those out.

[00:06:50] Speaker 00:
And the board reasoned, its reasoning stopped short because it just said, well, CERN teaches separate IC buffers, but to look at it in substance, CERN teaches that all the self-test circuitry goes into that IC buffer.

[00:07:05] Speaker 00:
And petitioner's theory relies on carving out portions of that self-test circuitry and placing it all in their own separate IC.

[00:07:12] Speaker 00:
CERN just doesn't teach that at all.

[00:07:15] Speaker 00:
CERN doesn't teach the distribution of Avrabuj's memory interfaces, therefore in separate ICs apart from one another, or apart from their single common sequencer.

[00:07:25] Speaker 00:
And you can find this, the CERN's teaching of self-test circuitry in Block 1883 in Figure 18 of Avrabuj, and also, I'm sorry, Figure 18 of CERN, and also Figure 1 of CERN.

[00:07:38] Speaker 00:
And I think we briefed this in detail.

[00:07:40] Speaker 00:
that at the end of the day CERN places all the self-test circuitry in a single IC, whereas the theory that petitioner raised is to carve out that self-test circuitry and put it in distinct ICs and CERN doesn't distinguish or teach the separation of address or control handling from data handling.

[00:08:01] Speaker 00:
It's all lumped together and that's inconsistent with the board's finding.

[00:08:04] Speaker 00:
The board's reasoning is legally erroneous and the findings lack substantial evidentiary support.

[00:08:11] Speaker 00:
I have time I would like to touch on there is a separate Basis of air we pointed out that the board relied on collateral stopple with respect to the earlier 979 71 decisions for the limitations of the independent claims with the Configuration there is incompatible with carving out Averbouche's memory interfaces and separate ICs as required by the dependent claims it had a single in that case the 970 case a single device block with a single sequencer and

[00:08:41] Speaker 00:
So what do you have?

[00:08:42] Speaker 00:
You have to carve out that.

[00:08:43] Speaker 00:
They're all embedded in the same IC.

[00:08:45] Speaker 00:
There must be some motivation to carve that out.

[00:08:49] Speaker 00:
Hynix treated this, and the board treated this, as a one-to-many issue of claim construction.

[00:08:53] Speaker 00:
But as we submitted in our reply, that went away.

[00:08:56] Speaker 00:
When the board went to collateral stopple, we're dealing with a single device block and a single sequencer.

[00:09:02] Speaker 00:
So the issue of a one-to-many claim construction went away.

[00:09:06] Speaker 00:
There's no possibility of aggregating

[00:09:08] Speaker 00:
sequencers as a control module across multiple device blocks.

[00:09:13] Speaker 00:
That issue went away, but there is a one-to-many issue of obviousness that remained, and that is in a single device block

[00:09:19] Speaker 00:
with a single sequencer paired with their memory interfaces, whether it would be obvious to carve out those memory interfaces, those plural memory interfaces apart from their single common sequencer.

[00:09:32] Speaker 00:
And CERN just doesn't teach that.

[00:09:34] Speaker 00:
And the board didn't even account for that.

[00:09:36] Speaker 00:
And Hynek submits that it's irrelevant.

[00:09:38] Speaker 00:
We submit that it's not.

[00:09:40] Speaker 00:
At the end of the day, you need to look to the structures of CERN.

[00:09:44] Speaker 00:
And CERN teaches that all the self-test circuitry would be placed in the same IC.

[00:09:48] Speaker 00:
What about paragraph 53 of CERN?

[00:09:56] Speaker 00:
Your Honor, if you want to tell me what your point is with respect to 53.

[00:10:04] Speaker 01:
It expressly says, in an embodiment, each memory device and buffer device are housed in separate packages.

[00:10:13] Speaker 01:
Why isn't that a disclosure?

[00:10:18] Speaker 00:
So that could rely on so I'm picking this up my separate component.

[00:10:22] Speaker 00:
Yeah, I believe what you're referring to is a not for test mode and And what was relied upon?

[00:10:29] Speaker 00:
What is that issue here is the test mode operation if you look at the test mode operation you can turn to figure 18 That's redundancy and repair circuit 1883 So in the buffer device you have all the address and control and all the data handling in the same I see figure 18 and

[00:10:48] Speaker 00:
Also on Figure 1, you can see that the control and data lines being operated with respect to the same IC.

[00:10:55] Speaker 00:
So we've got to go to CERN's teaching with respect to test mode.

[00:10:59] Speaker 00:
And on test mode, it places all the test circuitry in the same IC.

[00:11:09] Speaker 00:
There are no further questions?

[00:11:13] Speaker 00:
Thank you, Your Honor.

[00:11:19] Speaker 04:
May I please the court?

[00:11:21] Speaker 04:
At page 217 of the Joint Appendix, the combination of Avrabuj and CERN, analyzed in ground three for the dependent claims at issue here, is defined.

[00:11:33] Speaker 04:
On that page, it says that CERN discloses a plurality of circuits for handling data comprising physically separate components.

[00:11:41] Speaker 04:
And in the next paragraph, it says, it would have been obvious to include that separate components configuration of CERN

[00:11:48] Speaker 04:
into the system of average.

[00:11:50] Speaker 04:
That is the prior combination that we based our ground three analysis on for the dependent claims.

[00:11:58] Speaker 04:
Claim two was the basic one, and that was where it is.

[00:12:00] Speaker 04:
It says nothing about where the sequencers are placed.

[00:12:04] Speaker 04:
It says nothing about where the claimed control module is placed.

[00:12:07] Speaker 04:
And the reason it says nothing about those things is because the claims don't say anything about where the control module is placed.

[00:12:15] Speaker 04:
The dependent claims don't even mention the control module.

[00:12:18] Speaker 04:
And even the independent claim doesn't say where the control module is placed.

[00:12:22] Speaker 04:
It's irrelevant to these issues.

[00:12:25] Speaker 04:
And our proposed combination didn't treat that.

[00:12:29] Speaker 04:
That combination, defined at page 217 of the joint appendix,

[00:12:33] Speaker 04:
was the basis for the board's finding of unpatentability at the appendix pages 34 and 35.

[00:12:40] Speaker 02:
Was there any request for amendment in this area?

[00:12:45] Speaker 02:
Do you remember?

[00:12:46] Speaker 04:
Amendment of the claims of the foot?

[00:12:49] Speaker 04:
There was no motion to amend, Your Honor.

[00:12:51] Speaker 04:
No, there was not.

[00:12:53] Speaker 04:
The analysis of the board adopting our analysis in ground three also said nothing about where the sequencer was.

[00:13:02] Speaker 04:
or the control module.

[00:13:03] Speaker 04:
In fact, the board found that our analysis in Ground 3 is agnostic as to whether the sequencers are placed in the same packages as the memory interfaces.

[00:13:15] Speaker 04:
It could be either way.

[00:13:17] Speaker 04:
And that's absolutely correct, and that's a finding that I think is not an abuse of discretion.

[00:13:23] Speaker 04:
Now, that finding was clearly based on substantial evidence, first of all.

[00:13:28] Speaker 04:
The underlying facts were.

[00:13:29] Speaker 04:
The prior art, there's no question that attribution CERN were prior art.

[00:13:33] Speaker 04:
We supported the justifications for that combination with testimony from our expert and from citation to CERN and three other prior art references, supporting the motivations to combine we put forth.

[00:13:49] Speaker 04:
So it was clearly supported.

[00:13:51] Speaker 04:
Now, the board also found that our ground three analysis

[00:13:58] Speaker 04:
was not dependent on and, in fact, applied to all three mappings we used in our independent claim.

[00:14:05] Speaker 04:
That conclusion was also not an abuse of discretion.

[00:14:10] Speaker 04:
The portion of the petition that describes our analysis there never says anything about mappings.

[00:14:15] Speaker 04:
It doesn't use the word mapping.

[00:14:17] Speaker 04:
So it's clear that the board's conclusion that our analysis was not limited to mapping 2 was not clearly erroneous and, in fact, was absolutely correct.

[00:14:27] Speaker 04:
The board found, moreover, that Netlist never responded to our analysis as it applied to Mapping 1, which was the same mapping used in the prior case and formed the basis of the collateral stable finding.

[00:14:42] Speaker 04:
That finding that they didn't respond was also not an abuse of discretion or clearly erroneous because their entire patent owner response

[00:14:50] Speaker 04:
relies on the Mapping 2 analysis where the address generation circuitry is the claimed control module.

[00:14:59] Speaker 04:
Didn't have anything to do with Mapping 1.

[00:15:01] Speaker 04:
So what that means, Your Honor, is that the obviousness conclusions of the Board is premised on substantial evidence for the underlying factual questions and unrebutted reasoning for the ultimate legal question of obviousness.

[00:15:18] Speaker 04:
Under that, it seems to me

[00:15:20] Speaker 04:
that the court can do nothing but affirm.

[00:15:24] Speaker 04:
There's just nothing they said that addressed the actual reasoning that found these claims invalid for obviousness.

[00:15:33] Speaker 04:
Your Honor, unless you have some questions for me, I will cede the rest of my time.

[00:15:37] Speaker 04:
Thank you.

[00:15:44] Speaker 00:
Your Honor, we'd submit for the reasons I stated earlier that it's not irrelevant where the sequencer is placed and the obviousness issue.

[00:15:52] Speaker 00:
The issue is one of obviousness where a person with skill in the arts looking at Avrabouj and CERN and all of these components, the sequencer and the memory interfaces are on the same embedded integrated circuit so it's an issue of whether it'd be obvious to carve out the memory interfaces separate and apart from their single common sequencer.

[00:16:12] Speaker 00:
And that is an issue that CERN teaches.

[00:16:15] Speaker 00:
These devices, one would put all the self-test circuitry in the same IC.

[00:16:21] Speaker 00:
And that's just what CERN does on paragraph 97 and on figure 18, for example.

[00:16:27] Speaker 00:
And Your Honor, again, your reference to the question about paragraph 53 of CERN deals with normal mode, not test mode.

[00:16:36] Speaker 00:
And it's the test mode that we're looking at to average for its teachings.

[00:16:42] Speaker 00:
All of the teachings are to place all of the, the teachings of Avrabuj are to place all of the self-test circuitry in the same single IC.

[00:16:52] Speaker 00:
So neither Avrabuj does, Avrabuj admittedly doesn't teach breaking apart these, the various components of its embedded circuit, the sequencer and memory interfaces.

[00:17:03] Speaker 00:
And now we know CERN of course does not teach it because it puts all of these components in the same IC.

[00:17:08] Speaker 00:
Now, as responding to counsel's arguments about waiver, we have briefed and cited multiple places in our POR Patent Order response, in our argument, and elsewhere.

[00:17:21] Speaker 00:
I think there are six different sites from the hearing that we put in our brief, from the hearing transcript.

[00:17:30] Speaker 00:
And we said ad nauseam over and over.

[00:17:33] Speaker 00:
that CERN doesn't teach separation of the address unit from the data unit.

[00:17:37] Speaker 00:
And the address unit could be the address generation unit or the sequencer, but for mapping one at issue here, it's the sequencer, if that's the read.

[00:17:47] Speaker 00:
And we encompass that in all of our arguments.

[00:17:50] Speaker 00:
Just to pick one of them, it says there's just no teaching for separating whatever you want to call an address unit, meaning the sequencer or the address generation unit.

[00:18:00] Speaker 00:
There's no teaching for separating address generation from data or control from CERN.

[00:18:08] Speaker 00:
There are six sites from the transcript at the oral hearing 646 appendix 646 658 659 669 670 674 and 676 we also showed this graphically

[00:18:23] Speaker 00:
Appendix three three seven eight where the sequencer according to their theory would be placed directly into into the Sequencer on the emory interfaces would be placed directly into the CERN buffer we depicted this and we showed that you don't this would not pull out a

[00:18:40] Speaker 00:
Average is memory interfaces and place them in separate integrated circuits, so it wasn't waved it was argued was depicted or Visually was argued in the patent owner response the sites are in our brief and it was argued over six times in our at the oral hearing and Frankly, it's just as inexplicable that that was looked over, but setting that aside the teachings are

[00:19:08] Speaker 00:
Beyond debate frankly that CERN places all the self-test circuitry in the same single integrated circuit and Therefore it doesn't teach separation of ad of the memory interfaces from their single common sequencer Thank you, thank both sides and the case is submitted