[00:00:00] Speaker 04:
Our next case for argument today is 23-1712 XMT vs. Intel.

[00:00:04] Speaker 04:
Mr. Rowles, please proceed.

[00:00:08] Speaker 01:
Thank you.

[00:00:09] Speaker 01:
Good morning, Your Honors.

[00:00:10] Speaker 01:
Anthony Rowles for XMTT.

[00:00:12] Speaker 01:
May it please the Court.

[00:00:14] Speaker 01:
There are two

[00:00:15] Speaker 01:
independent claim construction errors that justify reversal here.

[00:00:19] Speaker 01:
First, the district court eliminated the phrase primarily in serial from the claim.

[00:00:24] Speaker 01:
It gave it no consideration either in the claim construction or when it assessed the evidence of infringement on summary judgment.

[00:00:30] Speaker 01:
Second, the construction of serial processor as one that, quote, executes instructions one at a time.

[00:00:37] Speaker 01:
would, I think, is undisputed at this point, would exclude virtually all the processors that were known at the time of the invention and decades prior for this purpose, which would be contrary to the intrinsic evidence, including the very purpose of the invention, as well as contrary to how Intel itself describes these categories of processors, serial and parallel processors, outside of this litigation.

[00:00:59] Speaker 01:
And each of these errors of claim construction are what we have an issue with and led directly to the district court

[00:01:07] Speaker 01:
in our view, incorrectly judging non-infringement.

[00:01:12] Speaker 05:
Can I just ask?

[00:01:13] Speaker 05:
How do you think that district court eliminated the word primarily?

[00:01:18] Speaker 05:
I took the district court to be saying, I'm only interpreting the two word phrase serial processor.

[00:01:25] Speaker 05:
That doesn't have primarily in it, but of course I'm not eliminating it from the rest of the claim language.

[00:01:31] Speaker 05:
So how is, you know, which would have to be met?

[00:01:35] Speaker 05:
And that point, the rest of the claim language, when the district court did the summary judgment of non-infringement,

[00:01:42] Speaker 05:
doesn't matter because there's not infringement just on the two word phrase.

[00:01:47] Speaker 05:
So I don't get the elimination point.

[00:01:49] Speaker 01:
Sorry, two responses to that, Your Honor.

[00:01:51] Speaker 01:
So first, leading up to summary judgment, there was actually a claim construction

[00:01:56] Speaker 05:
There seemed to be like five different occasions when client construction came up and parties kept saying, you don't need it.

[00:02:02] Speaker 05:
OK, we argued something before.

[00:02:04] Speaker 05:
We're not arguing it anymore.

[00:02:06] Speaker 05:
So it's just a giant mess by the time it came to summary judgment.

[00:02:10] Speaker 01:
Understood, Your Honor.

[00:02:12] Speaker 01:
Just months prior to summary judgment at Appendix 14-696 was the most recent summary judge or client construction decision.

[00:02:21] Speaker 01:
where the court agreed with XMTT that when the claim refers to a serial processor, it says XMTT notes that one of the claims states that a serial processor, quote, serial processor, is a, quote, processor adapted to execute software instructions in a software program primarily in serial.

[00:02:41] Speaker 01:
And Intel itself, when proposing constructions of, quote, serial processor, included the whole phrase including the modifier primarily in serial.

[00:02:50] Speaker 01:
So I think there was a

[00:02:51] Speaker 01:
an understanding that the language primarily in serial in the claim is an internal definition of what a serial processor needs to do in this product.

[00:03:02] Speaker 01:
The second response is, even if we assume that primarily in serial is still in the claim, it's just not part of this two word limitation.

[00:03:13] Speaker 01:
If we look at the district court's summary judgment analysis at appendix 16 and 17, when it gets to the literal judgment assessment, it does not consider XMTT's argument that the modifier primarily in serial means that the serial processor may perform some degree of parallel processing.

[00:03:36] Speaker 01:
The way that the district court treats the claim as it construed it

[00:03:39] Speaker 05:
is that if there is a... So I guess I'm genuinely confused about a number of things here.

[00:03:46] Speaker 05:
So when I read this specification, what I came away with was the following sense.

[00:03:53] Speaker 05:
The system has to do something primarily

[00:03:56] Speaker 05:
um, serial or parallel put aside for one minute, not small deal of how it can be both.

[00:04:06] Speaker 05:
Um, but that what's happening in that first phrase is that you have a serial processor, which only does things serially, but when you get

[00:04:16] Speaker 05:
When you have a program and you've got 27 instructions and you get to instruction number 17, that one it's useful to perform by parallel processing.

[00:04:27] Speaker 05:
So you transition to do that instruction number 17 with parallel processors and then maybe you come back and do the rest serially.

[00:04:37] Speaker 05:
It's not that the serial processor is ever, I don't think the specification ever says

[00:04:43] Speaker 05:
the serial processor sometimes does something other than serial processing, just that the system as a whole does.

[00:04:50] Speaker 05:
Tell me what's wrong with that.

[00:04:52] Speaker 01:
I think if we begin from the claim of the 388 patent, to use the example, the two concepts you've mentioned I think are claimed separately.

[00:05:01] Speaker 01:
So there's claim limitations related to transitioning in the system between a serial mode and a parallel mode, and that involves handing off

[00:05:10] Speaker 01:
part of a program from the serial process.

[00:05:12] Speaker 05:
No, I think what I'm thinking of is that it's handing off particular instructions, not whole programs.

[00:05:23] Speaker 05:
So I'm thinking particularly, I guess, of column five lines 46 to 52.

[00:05:30] Speaker 01:
Yes, Your Honor.

[00:05:31] Speaker 01:
So at Column 5, starting at Line 46, when it's discussing the switch from a serial mode to a parallel mode, I think it's describing when a parallel processing mode is desired

[00:05:43] Speaker 01:
the plurality of parallel processors take over processing the software instructions in the software program.

[00:05:49] Speaker 05:
And that's what I was trying to summarize in saying you have a 27 instruction program.

[00:05:56] Speaker 05:
The serial processor does 1 through 16.

[00:05:58] Speaker 05:
That's 17.

[00:05:59] Speaker 05:
It's useful to switch over to the parallel.

[00:06:01] Speaker 05:
But that doesn't contemplate that the serial processor is ever doing anything but serial.

[00:06:09] Speaker 01:
I think this particular phrase is talking about the transition, which I agree can be part of the program.

[00:06:15] Speaker 01:
I don't know that the specification is saying it must be instructions 10 to 15.

[00:06:22] Speaker 01:
In other words, there may be an instruction where the serial processor then commands the parallel processor to do some function.

[00:06:30] Speaker 05:
There's a lot in the specification about setting things up so that the parallel processor has all the information it needs to do this bit.

[00:06:39] Speaker 01:
When we get to the claim language, that transition process is claimed in a separate limitation.

[00:06:48] Speaker 01:
And then when the inventor described the two components, the serial processor and the parallel processor, he did so by specifying that the serial processor is adapted to execute instructions primarily in serial.

[00:07:02] Speaker 01:
Not that

[00:07:04] Speaker 01:
the system is configured.

[00:07:06] Speaker 05:
Do you disagree with what I think I'm remembering was the PTABS interpretation that that language and its counterpart and the other in the 388, I guess this is in the 388, refers to what the system is doing primarily, not what the individual processor is doing primarily?

[00:07:23] Speaker 01:
Yes, Your Honor.

[00:07:25] Speaker 01:
I disagree with that.

[00:07:25] Speaker 01:
I disagree with that.

[00:07:26] Speaker 01:
I think in view of the claim language, there are two components, I think, of the PTAB's construction.

[00:07:32] Speaker 01:
The PTAB did acknowledge that the serial processor when executing is doing so primarily in serial.

[00:07:40] Speaker 01:
The phrase was primarily in serial on the serial processor.

[00:07:44] Speaker 01:
And so we don't disagree with the primarily in serial part of that.

[00:07:49] Speaker 01:
But I think in terms of if there's a suggestion that

[00:07:53] Speaker 01:
all this language is talking about is a mode switch.

[00:08:00] Speaker 01:
I think that's inconsistent with the claim language itself.

[00:08:03] Speaker 01:
It would leave that adapted to execute software instructions primarily in serial without any real meaning because the claim separately describes this transition from a serial processing mode to a parallel processing mode.

[00:08:18] Speaker 02:
Well, could you address the adapted to language in the claim?

[00:08:26] Speaker 02:
It seems to me there's a suggestion that the serial processor itself doesn't inherently operate primarily in serial, but must be adapted to operate in primarily serial.

[00:08:44] Speaker 01:
So the adapted to language is only in one of the two patents.

[00:08:47] Speaker 01:
It's only in the 388 patent.

[00:08:49] Speaker 01:
I think the way the parties have dealt with it thus far is that it means something like configured to.

[00:08:54] Speaker 01:
It's describing the configuration of that processor.

[00:08:58] Speaker 01:
I think that's consistent with our view that this is how that particular processor executes instructions, which is different from how parallel processors execute instructions, the separate claim language.

[00:09:10] Speaker 01:
I don't think it's a

[00:09:11] Speaker 01:
sort of a real time, you don't think it means altered to not in, in, if, if your honor is saying in, in sort of real time during the execution of a program, no, I think this is how the, because the two claim ones you treat as standing or falling together.

[00:09:28] Speaker 01:
Correct.

[00:09:29] Speaker 05:
and one has adapted to and one doesn't.

[00:09:32] Speaker 01:
That's correct.

[00:09:32] Speaker 01:
I don't think either party suggests that there's a distinction because of the inclusion of adapted in one and the other.

[00:09:38] Speaker 04:
The district court's construction of serial processor is what I think would be the plain meaning of serial processor, if people understood what a serial processor was.

[00:09:50] Speaker 04:
But your argument, if I understand it right, is that basically through lexicography,

[00:09:55] Speaker 04:
you've taken a standard serial processor and modified it so it doesn't operate exactly like a standard serial processor would be understood to operate, and you did so expressly through the claim language.

[00:10:06] Speaker 04:
Is that your argument?

[00:10:08] Speaker 01:
I think it's slightly different than that, Your Honor.

[00:10:10] Speaker 01:
I think the intrinsic evidence indicates that at the time of the invention,

[00:10:15] Speaker 01:
the type of processor used for serial processing, like a CPU, had these characteristics.

[00:10:21] Speaker 01:
Like, for example, it would execute a pipeline of instructions where several of them are in progress at a time, but they finish one at a time.

[00:10:30] Speaker 01:
And that was within the understood meaning of serial processor.

[00:10:34] Speaker 01:
And so that's what's reflected in the introduction of the patent, where it describes the context of the invention.

[00:10:39] Speaker 01:
It's also acknowledged in the cited prior Dr. Vishkin patents, which Intel points to, like the 336 patent, which is at appendix 6-335, at column one, starting at line 20.

[00:10:54] Speaker 01:
So this is a 2002 patent application that says, the processing architecture employed by today's personal computers is based on this von Neumann architecture

[00:11:04] Speaker 01:
developed in the late 1940s goes on to say originally, 1940s, there was a presumption of this one at a time, nothing else is happening in between.

[00:11:14] Speaker 01:
Since then, that architecture, understood by those in the art to include things like a pipeline of instructions where they're still moving on an assembly line conveyor belt, but they are finishing

[00:11:26] Speaker 01:
one by one in serial.

[00:11:27] Speaker 01:
And so I think a person of skill reading the intrinsic evidence would understand that was within the scope of what was understood to be the serial type of processor at the time of the invention and before.

[00:11:39] Speaker 01:
And then the claim language using a term of degree like primarily only reinforces that.

[00:11:45] Speaker 01:
That it's not intended to be limited to the 1940s conception of a processor acting one instruction at a time, not starting anything until the first

[00:11:56] Speaker 05:
Let me say just a word about this other claim construction issue about executing and how it either does or does not relate to retirement of an instructor.

[00:12:09] Speaker 01:
Absolutely.

[00:12:10] Speaker 01:
So I think this is

[00:12:13] Speaker 01:
The definition of execute, I think, and we mentioned this at the summary judgment hearing and in our expert report, is using this definition of execute that was proposed by Intel's experts.

[00:12:27] Speaker 01:
So this is, if you look at appendix 10356, this is paragraph 76 of the expert report referring to Dr. Amott

[00:12:40] Speaker 01:
which is Intel's expert who says that executing an instruction means computation of an instruction's result is produced from its input.

[00:12:50] Speaker 01:
So what we did in infringement analysis was look at where in the Intel processor is the result of a program instruction produced.

[00:12:59] Speaker 01:
And it turns out in Intel's architecture, it's at the stage called retirement.

[00:13:03] Speaker 01:
That may not be the case for every processor.

[00:13:05] Speaker 01:
Some processors don't have a retirement stage.

[00:13:08] Speaker 01:
Some don't have these micro-operations as an example.

[00:13:11] Speaker 05:
But in this... Retirement means?

[00:13:13] Speaker 01:
In the Intel architecture, it means the instruction is done.

[00:13:17] Speaker 01:
It's completed.

[00:13:18] Speaker 01:
It's produced its results.

[00:13:20] Speaker 01:
If the instruction is to store something in memory,

[00:13:24] Speaker 01:
it's in memory.

[00:13:25] Speaker 01:
It has happened in the processor from the program's perspective.

[00:13:29] Speaker 01:
The program instruction has executed.

[00:13:31] Speaker 01:
That's what it means in the Intel product.

[00:13:33] Speaker 01:
I think the district court treated this as a claim construction issue about whether execute should include retirement or not.

[00:13:40] Speaker 01:
I think that's ultimately a factual question about a particular accused product.

[00:13:44] Speaker 01:
It may be that in another accused product,

[00:13:47] Speaker 01:
the instruction completes at a different stage.

[00:13:51] Speaker 01:
And that would be a different infringement analysis.

[00:13:53] Speaker 01:
But here, there's at least a material dispute of fact about whether that completion of instruction occurs in sequence.

[00:14:03] Speaker 01:
And Dr. Conte says that's at the retirement stage.

[00:14:06] Speaker 03:
OK.

[00:14:08] Speaker 03:
Why don't you save the rest of your time for rebuttal?

[00:14:11] Speaker 03:
Let's hear from Mr. Bondor.

[00:14:13] Speaker 01:
Thank you, Your Honor.

[00:14:28] Speaker 00:
May it please the court, Paul Bondor on behalf of Intel.

[00:14:32] Speaker 00:
I want to start with the proposition that, contrary to the picture painted by my opponent's briefs, that there was no startling miscarriage of justice below.

[00:14:45] Speaker 00:
The district court didn't go rogue, didn't issue sua sponte claim constructions without providing a full and fair opportunity to be heard.

[00:14:53] Speaker 05:
We didn't hear anything about that just now.

[00:14:55] Speaker 05:
Can you just get to the substance of it?

[00:14:57] Speaker 00:
Absolutely.

[00:14:59] Speaker 00:
Judge Toronto, you're 100% correct that a serial processor means something.

[00:15:05] Speaker 00:
The words serial processor mean something.

[00:15:08] Speaker 05:
Why doesn't it in context have to mean a processor that does this one-at-a-time thing mostly, but not entirely?

[00:15:18] Speaker 00:
Understood.

[00:15:18] Speaker 00:
I'm going to start with the proposition that the parties and the district court, and the short answer is it goes right to the transition phenomenon.

[00:15:26] Speaker 00:
Your honor is exactly right.

[00:15:28] Speaker 00:
The primarily in serial refers to the characteristics of the system when it is undertaking a transition.

[00:15:37] Speaker 00:
And in fact, primarily in serial, it's undisputed actually that primarily in serial.

[00:15:43] Speaker 05:
How can the system be primarily serial and primarily parallel?

[00:15:47] Speaker 00:
Well, I don't think in this particular instance the system can be primarily in serial or primarily in parallel at the same time.

[00:15:55] Speaker 00:
The key is in the transitions.

[00:15:58] Speaker 00:
So I'm going to back up for just a moment and talk about the structure of the claim.

[00:16:02] Speaker 00:
The claim has serial processor, right?

[00:16:05] Speaker 00:
And then the rest of it is adapted to execute instructions primarily in serial in the software program, or words to that effect.

[00:16:13] Speaker 00:
We know that the first instance,

[00:16:15] Speaker 00:
based on the intrinsic evidence, talks about the nature of the processor, its design and architecture, and that's what the district court was focused on.

[00:16:25] Speaker 00:
However, like I said, both the parties and the district court were aware of the remainder of the frames.

[00:16:31] Speaker 00:
So we know that primarily in serial can't refer to the internal operation of the serial processor because of all the statements that

[00:16:39] Speaker 00:
in XMTT made in the course of the IPR with serial processors being specialists designed specifically to be optimized for serial processing on one hand or parallel processing on the other side that they cannot be jack-of-all-trades processors that flip back and forth.

[00:16:56] Speaker 04:
The difficult thing for me is both parties were all over the place in so many different ways in this case so it doesn't help me to say it can't be this

[00:17:05] Speaker 04:
because they once said something in a different proceeding about this.

[00:17:09] Speaker 04:
You know, you have to tether it to the patent specification, please, for me.

[00:17:13] Speaker 00:
OK.

[00:17:14] Speaker 00:
I can.

[00:17:15] Speaker 00:
So the word primarily has to have meaning in both, or pardon me, the word serial has to have meaning both in the first instance, serial processor, and in the second instance, primarily in serial.

[00:17:26] Speaker 00:
That phrase, that second phrase, primarily in serial, relates to the character of the system

[00:17:32] Speaker 00:
when it's transferring modes.

[00:17:34] Speaker 04:
And are you suggesting that claim one, which says a serial processor adapted to execute instructions in a software program primarily in serial, that actually what's going to be happening not in serial is actually going to occur not in the serial processor, but in a series of parallel processors after there's a transition that shuts off the serial processor and transitions it over to the parallel processor?

[00:17:58] Speaker 00:
In part, Your Honor, but I'm going to be more specific than that.

[00:18:01] Speaker 00:
The serial processor is always doing its own work in serial.

[00:18:05] Speaker 00:
That's its nature.

[00:18:06] Speaker 00:
That's how it operates.

[00:18:07] Speaker 00:
The patent contemplates repeatedly this idea of transitions.

[00:18:12] Speaker 00:
And I want to get to Figure 4, for instance, just to illustrate kind of what we're talking about.

[00:18:17] Speaker 00:
Figure 4 in the appendix, it's at appendix 40.

[00:18:21] Speaker 00:
So the serial processor is always doing its work as the serial processor, doing things one at a time.

[00:18:26] Speaker 00:
But at times, it could be executing software instructions only primarily in serial because of other things going on in the system.

[00:18:35] Speaker 00:
During transition periods, during a transition between a serial processing mode to a parallel processing mode, the serial processing on the serial processor kind of ramps down as the parallel processors ramp up, creating points in time when... My problem is that that is true for the system.

[00:18:52] Speaker 04:
the system can switch modes between using serial processors and using parallel processors and that is definitely one of the embodiments disclosed in this patent.

[00:19:04] Speaker 04:
Mr. Roles stood up and said that that is one embodiment and then there is a different embodiment in this patent, a different embodiment that incorporates the primarily in serial language

[00:19:18] Speaker 04:
into the serial processor.

[00:19:20] Speaker 04:
And so that's what I understood him to say.

[00:19:22] Speaker 00:
OK.

[00:19:24] Speaker 00:
The passage that Mr. Roles pointed to was indeed a description of the transition of the system in system modes.

[00:19:31] Speaker 00:
But the point, to address your point squarely, Your Honor, the serial processor itself is already always operating serially.

[00:19:38] Speaker 00:
But in these transition points, the serial processor is ramping down.

[00:19:42] Speaker 00:
It's sending instructions to the parallel processors

[00:19:44] Speaker 00:
which are starting to ramp up.

[00:19:46] Speaker 00:
The specification talks about prefetch as an example.

[00:19:50] Speaker 00:
And as it is preparing to transition here, figure 4.408, the spawn point.

[00:19:57] Speaker 00:
The serial processor processing serially has sent its prefetched things to the parallel processors.

[00:20:04] Speaker 00:
The parallel processors are getting themselves ready.

[00:20:07] Speaker 00:
They're starting to execute instructions also.

[00:20:09] Speaker 00:
In that moment, the serial processor is processing serially itself, but viewed from a system perspective, as XMTT conceded that this language refers to, looking at it from a system perspective, at that same time, the serial processor's processing is happening

[00:20:28] Speaker 00:
in parallel with other things going on in the system.

[00:20:30] Speaker 00:
And the specification even talks about that point at column nine of lines 45 to 46.

[00:20:37] Speaker 00:
It states, in connection with figure four, the serial processor may still execute serial code while the prefetching is being performed.

[00:20:47] Speaker 00:
And so that's what gives life to both instances of serial.

[00:20:51] Speaker 00:
It's a serial processor, it's primarily in serial because there are some times when other things going on in the system

[00:20:57] Speaker 00:
and from the perspective of the system, it could be said to be operating in parallel with these other pieces.

[00:21:03] Speaker 04:
How can you have a system that is primarily in serial and also primarily in parallel?

[00:21:10] Speaker 04:
This is my problem.

[00:21:11] Speaker 04:
My problem is you want me to construe the first limitation almost in isolation in a way that makes it hard for me to say this is about the system.

[00:21:22] Speaker 04:
because I don't see how you can have a system that's primarily in serial and primarily in parallel.

[00:21:27] Speaker 00:
So to give an example, the system as described here is not in combination both primarily serial and primarily parallel all at the same time.

[00:21:40] Speaker 00:
It flips back and forth.

[00:21:41] Speaker 00:
And I'm going to go back to figure four.

[00:21:43] Speaker 00:
So figure four in steps 402, 404, 406, that is a serial mode.

[00:21:49] Speaker 00:
The system is in serial mode because all of the processing

[00:21:52] Speaker 00:
is going on in serial on the serial processor.

[00:21:57] Speaker 00:
When it hits parallel mode, it prepares to do the things as I described normally, or just a moment ago, and then it goes into parallel mode.

[00:22:05] Speaker 00:
So it flips from serial mode to parallel mode.

[00:22:09] Speaker 00:
The serial mode did not change its nature, the serial mode did not change its operation, but for those moments in time at this spawn and circumstances around it, it is operating simultaneously with

[00:22:20] Speaker 00:
the parallel processors, and therefore, from a system perspective, it could be said to be operating in parallel with the parallel processors.

[00:22:27] Speaker 00:
It doesn't change its nature.

[00:22:29] Speaker 00:
It's just a perspective of it.

[00:22:31] Speaker 00:
Then, in the parallel mode, Your Honor, the parallel mode is where the parallel processors have taken over.

[00:22:38] Speaker 00:
They're doing their thing.

[00:22:40] Speaker 00:
The serial processor is essentially idle, so it's either not processing or

[00:22:45] Speaker 00:
doing a loop or whatever, and then when it gets to .412, it joins again, and then it goes back, as the patent describes, into serial mode, where the processing is now back to the serial processor and it's serial processing, because the nature of these processors does not change simply how they're operating the system.

[00:23:09] Speaker 00:
The serial processors are always serial processors, and they're said to be so,

[00:23:14] Speaker 00:
and parallel processors.

[00:23:15] Speaker 04:
Even though the claim language says a serial processor adapted to, I mean forget about the other patent, I know it doesn't say adapted to, but this one does, the 388.

[00:23:25] Speaker 04:
It says adapted to.

[00:23:26] Speaker 04:
That suggests to me a serial processor that has been modified to do something.

[00:23:31] Speaker 00:
So I think the answer is that that adapted to language describes all of the interconnections and networks that enable the serial processor to be doing its thing serially

[00:23:43] Speaker 00:
and then transfer jobs to the parallel processors so that it can flip back and forth between serial mode and parallel mode.

[00:23:49] Speaker 00:
And that is the pivotal disclosure of the... I just don't understand.

[00:23:52] Speaker 04:
If your construction is right, and I'm not saying it isn't right right now, I'm really confused and tending to think this claim may be indefinite, but if your construction is correct, I don't see how there could ever be infringement.

[00:24:04] Speaker 04:
I don't see how you have a system that is operating primarily in series and primarily in parallel.

[00:24:09] Speaker 04:
I don't see how you ever have a system that could be infringed.

[00:24:11] Speaker 00:
And, Your Honor, I don't think that the system ever is trying to do both of those two things simultaneously, but you did put your finger on something else that is a fair observation to make, and that is that Dr. Vishkan, Uzi Vishkan, envisioned an entirely different type of computer architecture that would work entirely differently from conventional computers.

[00:24:33] Speaker 00:
You know, one of the things that XMTT says is, oh, it's a defect of the claim construction

[00:24:38] Speaker 00:
that it focuses only on serial processors, which are seldom used.

[00:24:42] Speaker 00:
But the fact is that serial processors are still available, and we have evidence of a Tensilica in-order processor, by way of example, in the actual

[00:24:56] Speaker 00:
record, and then on top of that, the only time that Professor Viskin tried to build it, he built it, or tried to build it, out of only serial inline processors.

[00:25:08] Speaker 00:
So there weren't any modern multi-core processors, there weren't any multi-threaded processors, there weren't any multiple issue parallel processors.

[00:25:16] Speaker 00:
So I think, Your Honor, the issue is that there is a disconnect between trying to read the claim on stuff that manifestly does not use the technology.

[00:25:25] Speaker 00:
But the concept of the technology set up in the patent is that you have a world where you have a serial processor quarterbacking these transitions, and you have a farm of parallel processors.

[00:25:35] Speaker 00:
And when most of the processing is going on on the serial processor, like in the serial mode between 402 and 408 in figure four, that's a serial mode.

[00:25:45] Speaker 00:
When most of the processing is shifted over to the parallel processors, that's a parallel mode.

[00:25:50] Speaker 00:
That's what's going on between 408 and 412.

[00:25:52] Speaker 00:
And then when it comes back,

[00:25:53] Speaker 00:
It goes to 412 and it's back in the serial mode because the serial processor is doing serial processing essentially exclusively.

[00:26:01] Speaker 00:
And so that's why the system switches back and forth.

[00:26:04] Speaker 00:
The system is at times primarily operating processing in parallel.

[00:26:09] Speaker 05:
What work is being done by the primarily

[00:26:16] Speaker 00:
I actually I think your honor the only explanation that I could give is that primarily is being used to to blur things around the edges so that so that people who wanted to use the system couldn't point to these transition points and say aha at that particular moment the serial processor is actually go doing its processing simultaneously with the parallel processors therefore it's actually a parallel processor so I think it's meant to grab these moments of transition where

[00:26:46] Speaker 00:
both the serial processors processing still, because it's ramping down, and the parallel processors are ramping up.

[00:26:53] Speaker 00:
And so that's the work that primarily does.

[00:26:56] Speaker 05:
Does the specification enlighten us at all about primarily whether it's referring to an amount of time or an amount of some input or something?

[00:27:12] Speaker 00:
No, I actually think that the... So, to answer the question this way first, every time that the specification uses the term primarily, it does so in the context of the system.

[00:27:22] Speaker 00:
It's describing the system.

[00:27:24] Speaker 00:
It happens in column one, it happens at the bottom of column two, and then it also happens, I believe, in column nine.

[00:27:29] Speaker 00:
And in each case, when the word primarily shows up, it is talking about the system's behavior

[00:27:36] Speaker 00:
not the character of the system, the system's behavior.

[00:27:39] Speaker 00:
So that's thing one.

[00:27:41] Speaker 03:
What about column three, line one?

[00:27:48] Speaker 00:
So I think in column three, line one, that is a continuation of a larger description of the apparatus.

[00:27:54] Speaker 00:
It starts at the bottom of column two, and it is discussing all of these things with the interconnection network adapted

[00:28:02] Speaker 00:
so that these things can be processed substantially in parallel.

[00:28:06] Speaker 00:
It's talking about the memory interactions.

[00:28:11] Speaker 00:
The top of column three is exactly the point that I'm making.

[00:28:15] Speaker 00:
The serial processor coupled to the broadcast network and adapted to execute instructions in the software program primarily in serial because it's going to do those handoffs through the memory interconnect to the parallel processor.

[00:28:33] Speaker 00:
The other instance is in column 11.

[00:28:36] Speaker 00:
So we have the system description about a mix.

[00:28:40] Speaker 00:
So we have column 1, lines 61 to 64.

[00:28:46] Speaker 00:
We have the instance that Chief Judge Moore noted at the bottom of 2 going over to the top of 3.

[00:28:54] Speaker 00:
And then the other place that primarily sits is in column 11 at approximately line 46 and following.

[00:29:02] Speaker 00:
And so Judge Toronto, to answer your question, I think that the fair read of the description and specification is that the primarily business talks about the system mode and whether most of the processing is happening in the parallel processors or whether most of the processing is happening.

[00:29:21] Speaker 05:
And the most is measured in what units?

[00:29:25] Speaker 00:
That's a fair point.

[00:29:27] Speaker 00:
I think that the way that it's described is, I think that it's basically, is the processor still active or not?

[00:29:35] Speaker 00:
So going back to figure four, you see in the serial mode, there is only one line.

[00:29:43] Speaker 00:
There's one line going on.

[00:29:44] Speaker 00:
That's the serial line with the serial processor.

[00:29:46] Speaker 00:
That's why it's the serial mode.

[00:29:48] Speaker 00:
And then the parallel mode happens between 408 and 412 when there's a spawn and a join command.

[00:29:56] Speaker 00:
4, 8, 4, 10, 4, 12, that we know is when the parallel mode is active and the serial mode is doing little, if anything.

[00:30:04] Speaker 00:
That's why it's adapted to do these hands-off.

[00:30:07] Speaker 00:
It's adapted to enable these hand-offs so that you can have a switch from a serial processing mode to a parallel processing mode.

[00:30:16] Speaker 00:
I want to add, too, that the same type of hand-off process where the serial processor is doing things

[00:30:23] Speaker 00:
to prepare, to hand off, but is still working while the parallel processors get going is also in Figure 5.

[00:30:30] Speaker 00:
So I want to do that.

[00:30:31] Speaker 04:
But in terms of... All right.

[00:30:35] Speaker 04:
Thank you, Mr... Thank you, Mr. Bondor.

[00:30:36] Speaker 04:
Mr. Rawls, we'll give you two minutes of rebuttal time because Mr. Bondor went over.

[00:30:46] Speaker 01:
Thank you, Your Honor.

[00:30:47] Speaker 01:
May it please the Court?

[00:30:48] Speaker 01:
I want to focus, if I can, on the intrinsic evidence and the specifications.

[00:30:52] Speaker 01:
There was a suggestion that this patent is directed to some completely different type of processor architecture that was different from what was being done in the art.

[00:31:00] Speaker 01:
The title of the patent is a computer memory architecture for hybrid serial parallel systems.

[00:31:06] Speaker 01:
The background states that hybrid serial parallel systems are something that existed.

[00:31:11] Speaker 01:
People used a CPU for the serial tasks and a GPU for the parallel tasks, and that's exactly how Intel describes it in its own patents at Appendix 10.4.10.

[00:31:21] Speaker 01:
A CPU is an architecture designed for serial processing.

[00:31:24] Speaker 01:
A GPU is an architecture designed for parallel processing.

[00:31:28] Speaker 01:
And then when we look at, so the patent is describing a way to, a novel memory architecture to make those systems more efficient.

[00:31:35] Speaker 01:
So that's the purpose of the invention, the background that a Posita would be working from.

[00:31:39] Speaker 01:
Now when the patent talks about serial execution at column four, starting at line 39,

[00:31:45] Speaker 01:
Serial processor 14 is configured to process a software program in serial.

[00:31:50] Speaker 01:
For example, software instructions in the software program may be executed serially as in a von Neumann or other sequential architecture or the like.

[00:31:58] Speaker 01:
So I'll set aside primarily for now, but if we look at what the intrinsic evidence says about such processors, there's no dispute that by this time all of the CPU processors that are used for this purpose are doing things

[00:32:12] Speaker 01:
with a pipeline in a way that is different from the strict one-at-a-time construction of the district court.

[00:32:19] Speaker 01:
So the 336 patent, which is cited on the face of the 388 patent, it's acknowledged by Intel to be intrinsic evidence, it's Appendix 6-335.

[00:32:27] Speaker 01:
The processing architecture employed by today's personal computers is based on the von Neumann architecture, which originally presumed that things were happening one at a time with no concurrent operations.

[00:32:39] Speaker 01:
but has evolved to include what it calls pipelining, instruction-level parallelism, things that can be going on during the execution of an instruction in a sequence.

[00:32:48] Speaker 01:
And that pattern at column one, line 57, concludes that with very few exceptions, most present-day computers have this pipeline where instructions and data move from one pipeline stage to the next.

[00:33:01] Speaker 01:
That would be excluded by the district court's construction as Intel is interpreting it.

[00:33:04] Speaker 01:
Intel says serial means the processor does one instruction and waits until it finishes before it even starts the next.

[00:33:11] Speaker 01:
It can't do anything in between.

[00:33:13] Speaker 01:
That would exclude what the inventor in the intrinsic evidence is saying

[00:33:17] Speaker 01:
is serial execution, let alone primarily in serial, but serial execution is, in the context of this patent, is understood to include these techniques, like instruction level parallelism.

[00:33:28] Speaker 01:
The 527 patent, at Appendix 6306, also cited, intrinsic evidence, is consistent with this.

[00:33:36] Speaker 01:
It says the way commodity computers have been designed is based on this so-called von Neumann architecture, where the instructions are executed sequentially, at column one, line 48,

[00:33:46] Speaker 01:
All major computer vendors have announced processors having this instruction level within an instruction parallelism, and they deviate from the historical sequential extraction of strictly one at a time.

[00:33:58] Speaker 04:
Thank you, Mr. Else.

[00:33:59] Speaker 04:
You're over your time substantially, so this case is taken under submission.

[00:34:03] Speaker 04:
We thank both parties.

[00:34:05] Speaker 01:
Thank you, Your Honor.